This invention relates generally to multilayer printed circuit boards and, more particularly, to multilayer printed circuit boards having coefficients of thermal expansion that approximate that of the electronic components to be mounted on the circuit boards.
Multilayer printed circuit boards are widely used for interconnecting large numbers of integrated-circuit (IC) chips. The IC chips are usually hermetically sealed in individual chip carriers fabricated from a ceramic material, such as aluminum oxide. Bonded leads are brought out from each IC chip to the edges of the chip carrier, and the chip carrier is then soldered directly to the circuit board. The principal advantages of this structure are significantly higher circuit densities, improved speed and impedance characteristics, and substantially reduced packaging costs.
A major drawback of using ceramic chip carriers is that the coefficient of thermal expansion of aluminum oxide is approximately one-half the coefficient of thermal expansion of the glass/epoxy laminates that are typically used in the manufacture of multilayer printed circuit boards (5.5 to 6.times.10.sup.-6 in/in/.degree.C. for aluminum oxide compared with 12 to 15.times.10.sup.-6 in/in/.degree.C. for glass/epoxy). When the resulting structure is exposed to any significant range of temperatures, the thermal cycling of the structure can crack soldered joints and render the circuit inoperative. One solution to this problem is to use an intermediate member between the chip carrier and the circuit board. The intermediate member is sometimes referred to as a baby board and the circuit board as a mother board. The intermediate member may also take the form of a hybrid package on which the chip carrier is mounted.
Another solution to the thermal mismatch between a ceramic chip carrier and a multilayer printed circuit board is to tailor the coefficient of thermal expansion of the circuit board to that of the chip carrier. One technique for matching the two coefficients of thermal expansion is to bond the circuit board to the surface of a graphite support member, as disclosed in U.S. Pat. No. 4,318,954 to Jensen and U.S. Pat. No. 4,609,586 to Jensen et al. The graphite support member has a coefficient of thermal expansion that is approximately zero and when a conventional circuit board is bonded to the support member, the coefficient of thermal expansion of the circuit board is reduced to about that of a ceramic chip carrier.
Another technique for matching the coefficient of thermal expansion of a ceramic chip carrier to that of a multilayer printed circuit board is to fabricate the multilayer circuit board from multiple layers of a dielectric material interleaved with multiple layers of graphite, as disclosed in U.S. Pat. No. 4,591,659 to the present inventor. Some of the layers of dielectric material are copper-clad layers having etched electrical patterns for electrically interconnecting the IC chips. The layers of graphite reduce the coefficient of thermal expansion of the copper patterns and the dielectric material, and the layers of graphite are spaced symmetrically across the circuit board to minimize bending of the board during temperature changes. Some of the layers of graphite are positioned in close proximity to the layers of copper-clad dielectric material in order to conduct heat away from the IC chips.
A similar technique for matching the coefficients of thermal expansion is to fabricate the multilayer circuit board from multiple layers of copper interleaved with multiple layers of a composite material, as disclosed in U.S. Pat. No. 4,513,055, also to the present inventor. The composite material is fabricated from a woven fabric that is embedded in a resin matrix. The fabric is woven from yarns of two different materials, one having a negative coefficient of thermal expansion and the other having a positive coefficient of thermal expansion. The proportions of the two materials are selected to provide a circuit board having a desired coefficient of thermal expansion. U.S. Pat. No. 4,414,264 to Olson discloses another multilayer circuit board utilizing multiple layers of a woven-fabric composite material.
All of these techniques, which tailor the coefficient of thermal expansion of the multilayer printed circuit board to that of the ceramic chip carrier, rely on either a conductive metal, such as graphite, or a woven-fabric composite material to reduce the coefficient of thermal expansion of the circuit board. However, each of these techniques has certain disadvantages. Accordingly, there still exists a need for an improved multilayer printed circuit board for ceramic chip carriers. The present invention clearly fulfills this need.